ATAM862 datasheet(22/110 Pages) ATMEL

22 / 110 page

4554E–4BMCU–05/06

ATAM862-3

16.8

Software Interrupts

The programmer can generate interrupts by using the software interrupt instruction (SWI), which

is supported in qFORTH by predefined macros named SWI0...SWI7. The software triggered

interrupt operates exactly like any hardware triggered interrupt. The SWI instruction takes the

top two elements from the expression stack and writes the corresponding bits via the I/O bus to

the interrupt pending register. Therefore, by using the SWI instruction, interrupts can be re-prior-

itized or lower priority processes scheduled for later execution.

16.9

Hardware Interrupts

In the microcontroller block, there are eleven hardware interrupt sources with seven different lev-

els. Each source can be masked individually by mask bits in the corresponding control registers.

An overview of the possible hardware configurations is shown in Table 16-2.

Table 16-2.

Hardware Interrupts

Interrupt

Interrupt Mask

Interrupt Source

Bit

INT1

P5CR

P52M1, P52M2

P53M1, P53M2

Any edge at BP52

any edge at BP53

INT2

T1M

T1IM

Timer 1

INT3

SISC

SIM

SSI buffer full/empty or BP40/BP43 interrupt

INT4

T2CM

T2IM

Timer 2 compare match/overflow

INT5

T3CM1

T3CM2

T3C

T3IM1

T3IM2

T3EIM

Timer 3 compare register 1 match

Timer 3 compare register 2 match

Timer 3 edge event occurs (T3I)

INT6

P5CR

P50M1, P50M2

P51M1, P51M2

Any edge at BP50,

any edge at BP51

INT7

VCM

VIM

External/internal voltage monitoring

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