USB97C100QFP datasheet(24/64 Pages) SMSC

24 / 64 page

SMSC DS – USB97C100

Page 24

Rev. 01/03/2001

MCU Power Management Registers

Table 27 - MCU/ISADMA Clock Source Select

CLOCK_SEL

(0x7F27 - RESET=0x40)

MCU/ISADMA CLOCK SOURCE SELECT

BIT

NAME

R/W

DESCRIPTION

SLEEP

R/W

When PCON. 0 = 1 and SLEEP has been set to 1, the

ring oscillator will be gated off, then all oscillators will be

turned off for maximum power savings. (These two signals

can be used to generate nFCE)

ROSC_EN

R/W

0 = Ring Oscillator Disable.

1 = Ring Oscillator Enable. ROSC_EN must be set to 1

before the MCU can be switched to the internal Ring

Oscillator Clock source.

MCUCLK_SRC

R/W

MCUCLK_SRC overrides MCUCLK_x clock select and

switches the MCU to the Ring Oscillator.

0 = Use Ring Oscillator. ROSC_EN must be enabled by

the MCU first.

1 = Use clock specified in MCU_CLK_[1:0]

[4:3]

MCU_CLK[1:0]

R/W

[4:3] = 00: 8MHz

[4:3] = 01: 12MHz

[4:3] = 10: 16MHz

[4:3] = 11: 24MHz

ISADMACLK_EXT

R/W

Selects an external clock source for the 8237 ISADMA

controller for synchronizing the DMA with another block.

NOTE: This will initially be an external input, but may

eventually be used within the block to optimize

performance, or as some other internal clock source.

0 = Use ISADMACLK[1..0] select

1 = Use EXT_IN clock source for 8237

[1:0]

ISADMACLK[1:0]

R/W

[1:0] = 00: Stopped

[1:0] = 01: 2MHz

[1:0] = 10: 4MHz

[1:0] = 11: 8MHz

Notes:

The 8051 may program itself to run off of an internal Ring Oscillator having a frequency range between 4 and

12MHz. This is not a precise clock, but is meant to provide the 8051 with a clock source, without running the

24MHz crystal oscillator or the PLL

Switching between fast and slow clocks is recommended to save power.

Clock switching can be done on the fly as long as both clocks are running. When switching, it takes a total of six

clocks (3 clocks of the original clock plus 3 clocks of the switching clock) to guarantee the switching.

Time TBD is required from ROSC_EN=1 to MCUCLK_SRC=0.

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