AM29LV040B_06 datasheet(11/37 Pages) AMD

11 / 37 page

October 11, 2006 21354E4

Am29LV040B

D A TA

SH EE T

in this mode. Refer to the Autoselect Mode and Autose-

lect Command Seque nce sect ions fo r mo re

information.

ICC2 in the DC Characteristics table represents the

active current specification for the write mode. The “AC

Characteristics” section contains timing specification

tables and timing diagrams for write operations.

Program and Erase Operation Status

During an erase or program operation, the system may

check the status of the operation by reading the status

bits on DQ7–DQ0. Standard read cycle timings and ICC

read specifications apply. Refer to “Write Operation

Status” for more information, and to “AC Characteris-

tics” for timing diagrams.

Standby Mode

When the system is not reading or writing to the device,

it can place the device in the standby mode. In this

mode, current consumption is greatly reduced, and the

outputs are placed in the high impedance state, inde-

pendent of the OE# input.

The device enters the CMOS standby mode when the

CE# pin is both held at VCC ± 0.3 V. (Note that this is a

more restricted voltage range than VIH.) If CE# is held

at VIH, but not within VCC ± 0.3 V, the device will be in

the standby mode, but the standby current will be

greater. The device requires standard access time (tCE)

for read access when the device is in either of these

standby modes, before it is ready to read data.

If the device is deselected during erasure or program-

ming, the device draws active current until the

operation is completed.

ICC3 in the DC Characteristics table represents the

standby current specification.

Automatic Sleep Mode

The automatic sleep mode minimizes Flash device

energy consumption. The device automatically enables

this mode when addresses remain stable for tACC + 30

ns. The automatic sleep mode is independent of the

CE#, WE#, and OE# control signals. Standard address

access timings provide new data when addresses are

changed. While in sleep mode, output data is latched

and always available to the system. ICC4 in the DC

Characteristics table represents the automatic sleep

mode current specification.

Output Disable Mode

When the OE# input is at VIH, output from the device is

disabled. The output pins are placed in the high imped-

ance state.

Table 2.

Am29LV040BT Sector Address Table

Autoselect Mode

The autoselect mode provides manufacturer and

device identification, and sector protection verification,

through identifier codes output on DQ7–DQ0. This

mode is primarily intended for programming equipment

to automatically match a device to be programmed with

its corresponding programming algorithm. However,

the autoselect codes can also be accessed in-system

through the command register.

When using programming equipment, the autoselect

mode requires VID (11.5 V to 12.5 V) on address pin

A9. Address pins A6, A1, and A0 must be as shown in

Table 3. In addition, when verifying sector protection,

the sector address must appear on the appropriate

highest order address bits (see Table 2). Table 3 shows

the remaining address bits that are don’t care. When all

necessary bits have been set as required, the program-

ming equipment may then read the corresponding

identifier code on DQ7–DQ0.

To access the autoselect codes in-system, the host

system can issue the autoselect command via the

command register, as shown in Table 4. This method

does not require VID. See “Command Definitions” for

details on using the autoselect mode.

Sector

A18

A17

A16

Address Range

(in hexadecimal)

SA0

00000h-0FFFFh

SA1

10000h-1FFFFh

SA2

20000h-2FFFFh

SA3

30000h-3FFFFh

SA4

40000h-4FFFFh

SA5

50000h-5FFFFh

SA6

60000h-6FFFFh

SA7

70000h-7FFFFh

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