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M700000002 데이터시트(PDF) 78 Page - SPANSION |
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M700000002 데이터시트(HTML) 78 Page - SPANSION |
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78 / 128 page ![]() 76 Am70PDL127BDH/Am70PDL129BDH November 25, 2003 AD VAN C E INFORM ATION pSRAM AC CHARACTERISTICS Notes: 1. If the device is using the I/Os to output data, input signals of reverse polarity must not be applied. 2. If OE# is high during the write cycle, the outputs will remain at high impedance. Figure 27. Pseudo SRAM Write Cycle— UB#s and LB#s Control tWC Valid Data In Addresses A20 to A0 WE# CE#1s CE2s UB#, LB# DIN DQ15 to DQ0 DOUT DQ15 to DQ0 tDS tWR tWP tCW High-Z High-Z tCH tDH tAS tBW tBE tCOE tODW |
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