1996 Jun 19

17

Philips Semiconductors

Preliminary specification

CAN Serial Linked I/O device (SLIO) with

digital and analog port functions

P82C150

7.3.4

The P82C150 can pass through four CAN-bus modes

under certain conditions (see Fig.8). In the bus modes

0 to 2 (see Table 10) the P82C150 is operating with

different input comparator configurations. Bus mode 3 is

the power reduced Sleep Mode.

The bus modes support:

• Communication on two balanced wires (differential

system)

• Communication on one wire in a two-wire differential

system

• Sleep Mode with wake-up via either a dominant signal

on RX0 or RX1 input

• Connection of a second transmission medium

(redundancy)

There are two possibilities for condition 1 to switch to the

next mode (see Fig.8):

• Overflow of the bit counter when 8192 is reached since

the last calibration message

• Overflow of the Transmit Error Counter (>255; bus-off

limit reached).

When the bus mode changes, all I/O Registers are cleared

and outputs become floating (OE bits cleared). That

means the I/O ports return to a fail-safe state whenever the

P82C150 looses connection to its host controller. This is a

kind of network watchdog function. The status bits are set

to the following values after a bus mode change:

• RSTD = 1

• EW = 0

The programmed Identifier bits remain unchanged.

After reset the P82C150 changes directly into bus mode 3

(Sleep Mode). During Sleep Mode, the internal RC

oscillator is stopped, and all the output drivers are disabled

(I/O Register contents cleared). A P82C150 in Sleep Mode

can be woken up via CAN-bus lines (dominant level on

RX0 or RX1) or by a reset condition.

Fig.8 CAN-bus modes and switch-over conditions.

columns

DIFFERENTIAL

MODE

Inputs: RX0, RX1

Outputs: TX0, TX1

'0'

ONE-WIRE

RX1 MODE

Input: RX1

Outputs: TX0, TX1

'1'

'2'

SLEEP

MODE

Inputs: RX0, RX1

Outputs: no

'3'

ONE-WIRE

RX0 MODE

Input: RX0

Output: TX0

Condition 1

Condition 1

Condition 1

Condition 2

MHA070

end of

RESET

Condition 1:

bit counter overflow (>8191) or Transmit Error Counter overflow (>255).

Condition 2:

dominant bit detected on RX0 and RX1.

Table 10 Can-bus modes

Note

1. Output TX1 is disabled in bus mode 2 to tolerate short-circuit between the CAN-bus wires CAN_H and CAN_L.

BUS MODE

BITS

RECEPTION LEVEL

TRANSMISSION

BM1

BM0

RECESSIVE

DOMINANT

TX1

TX0

0 = Differential

0

0

RX0 > RX1

RX0 < RX1

enabled

enabled

1 = One-wire RX1

0

1

RX1 < REF

RX1 > REF

enabled

enabled

2 = One-wire RX0

1

0

RX0 > REF

RX0 < REF

disabled

enabled

3 = Sleep

1

1

RX0 > REF

and

RX1 < REF

RX0 < REF

or

RX1 > REF

disabled

disabled