ST92F124 datasheet(278/429 Pages) STMICROELECTRONICS

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I2C BUS INTERFACE

I2C BUS INTERFACE (Cont’d)

I2C OWN ADDRESS REGISTER 2 (I2COAR2)

R245 - Read / Write

Reset Value: 0000 0000 (00h)

Bits 7:6,4 = FREQ[2:0] Frequency bits.

IMPORTANT: To guarantee correct operation,

set these bits before enabling the interface

(while I2CCR.PE=0).

These bits can be set only when the interface is

disabled (I2CCR.PE=0). To configure the interface

to I2C specified delays, select the value corre-

sponding to the microcontroller internal frequency

INTCLK.

Note: If an incorrect value, with respect to the

MCU internal frequency, is written in these bits,

the timings of the peripheral will not meet the I2C

bus standard requirements.

Note: The FREQ[2:0] = 100, 101, 110, 111 config-

urations must not be used.

Bit 5 = EN10BIT Enable 10-bit I2Cbus mode.

When this bit is set, the 10-bit I2Cbus mode is en-

abled.

This bit can be written only when the peripheral is

disabled (I2CCR.PE=0).

0: 7-bit mode selected

1: 10-bit mode selected

Bits 4:3 = Reserved.

Bits 2:1 = ADD[9:8] Interface address.

These are the most significant bits of the I2Cbus

address of the interface (10-bit mode only). They

are not cleared when the interface is disabled

(I2CCR.PE=0).

Bit 0 = Reserved.

I2C DATA REGISTER (I2CDR)

R246 - Read / Write

Reset Value: 0000 0000 (00h)

Bits 7:0 = DR[7:0] I2C Data.

– In transmitter mode:

I2CDR contains the next byte of data to be trans-

mitted. The byte transmission begins after the

microcontroller has written in I2CDR or on the

next rising edge of the clock if DMA is complete.

– In receiver mode:

I2CDR contains the last byte of data received.

The next byte receipt begins after the I2CDR

read by the microcontroller or on the next rising

edge of the clock if DMA is complete.

GENERAL CALL ADDRESS (I2CADR)

R247 - Read / Write

Reset Value: 1010 0000 (A0h)

Bits 7:0 = ADR[7:0] Interface address.

These bits define the I2Cbus General Call address

of the interface. It must be written with the correct

value depending on the use of the peripheral.If the

peripheral is used in I2C bus mode, the 00h value

must be loaded as General Call address.

The customer could load the register with other

values.

The bits can be written only when the peripheral is

disabled (I2CCR.PE=0)

The ADR0 bit is don’t care; the interface acknowl-

edges either 0 or 1.

Note: Address 01h is always ignored.

FREQ1 FREQ0 EN10BIT FREQ2

ADD9

ADD8

INTCLK

Range

(MHz)

FREQ2

FREQ1

FREQ0

2.5 - 6

6- 10

10- 14

14 - 24

DR7

DR6

DR5

DR4

DR3

DR2

DR1

DR0

ADR7 ADR6 ADR5 ADR4 ADR3 ADR2 ADR1 ADR0

ST92F124 데이터시트(PDF) 278 Page - STMicroelectronics

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