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Notes

1. X = don’t care.

2. SDA is left at high-impedance by the microcontroller during the READ acknowledge.

22

slave address for read

PHILIPS

during the acknowledge cycle the content of the DR is loaded

previous instruction neither a ‘set address’ nor a ‘read data’ has

been performed; therefore the content of the DR was unknown

SA6

SA5

SA4

SA3

SA2

SA1

SA0

R/W

Ack

011101011

23

read data: 8

× SCL + master acknowledge; note 2

PHILIPS

8

× SCL; content loaded into interface during previous

acknowledge cycle and shifted out over SDA; MSB is DB7;

during master acknowledge content of DDRAM address 01 is

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

Ack

XXXXXXXX

1

24

read data: 8

× SCL + master acknowledge; note 2

PHILIPS

8

× SCL; code of letter ‘H’ is read first; during master

interface

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

Ack

010010000

25

read data: 8

× SCL + no master acknowledge; note 2

PHILIPS

interface register is shifted out no internal action is performed;

no new data is loaded to the interface register; DR is not

updated; AC is not incremented and cursor is not shifted

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

Ack

010010011

26

PHILIPS

STEP

INSTRUCTION

DISPLAY

OPERATION