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AS73211

Datasheet

• PUBLIC

DS000556

• v3-01 • 2018-Feb-07

│ 51

8.5

– BREAK

The register BREAK defines the time between two consecutive measurements of CONT, SYNS and

SYND mode. The default value of register BREAK is 19h. The value 0h results in a minimum time of

three clocks of fCLK.

Figure 51:

– Address 9h

BREAK

NAME

VALUE

[dec]

DESCRIPTION

bit 7 to 0

BREAK

0 to 255

(25) (1)

Pause time TBREAK between two measurements (except

CMD mode): from 0 (2) to 2040

μs, step size 8 μs

(1)

Default value after power-on reset and software reset.

(2)

The value 0h results in a minimum time of 3 clocks of fCLK.

8.6

– EDGES

The register EDGES becomes operative in SYND mode. After a measurement was started in SYND

mode it defines the necessary number of additional falling edges at input SYN until the conversion is

termina

ted. The value EDGES = ‚0‘ is not allowed and results in the initial value ‚1’.

8.7

– OPTREG

The register bit OPTREG:INIT_IDX allows to communicate via I²C with simple masters, which do not

support the I²C Repeated START condition. In this case the start address for a read operation can

only be set by a complete write access with I²C STOP condition at the end. For this kind of simple I²C

masters the bit INIT_IDX has to be ‚0‘. Reading of data starts then at the given index address. After

each data transfer the index address is incremented.

With INIT_IDX set

to ‚1‘ each short read operation starts at the default address 2h in Measurement

mode and 0h in Configuration mode. The setting of the internal read index address by writing to a

the index address is incremented. Please see also chapter “I²C Read Protocol”.

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