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AS7343L

Functional Description

Datasheet

• PUBLIC

DS001038

• v2-00 • 2022-Aug-12

│ 16

8.1

Device Architecture

The device features six independent 16-bit ADCs. Gain and integration time of the six ADCs can be

adjusted with the I2C interface. A wait time can be programed to automatically set a delay between two

consecutive spectral measurements and to reduce overall power consumption. Once a measurement

is started, the device is automatically processing the channels and storing the measurement data on

chip in the corresponding data registers.

Figure 13:

Simplified Block Diagram

CH0 ADC

CH1 ADC

CH2 ADC

CH3 ADC

CH4 ADC

CH5 ADC

Data 1

Data 2

Data 3

Data 18

6 x 16bit

ADC

GPIO

VDD

I2C

Interface

SCL

SDA

interrupt

handling

INT

GND

OTP

RC-

osc

5x5 PD array

on chip IF Filter

LDR

PGND

automatic

measurement engine

SYNC input

18 x 16bit

DATA

256 byte

FIFO

LED

Driver

NIR PD

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