TMD2621 datasheet(41/59 Pages) OSRAM

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[v4-00] 2023-Apr-12

TMD2621 − Register O ver view

PSD_L Register (Address 0xEA)

Figure 56:

PSD_L Register

PSD_H Register (Address 0xEB)

Figure 57:

PSD_H Register

The PSD (Proximity Start Delay) timing registers control the

start of proximity measurement after detect of VSYNC signal. It

is a 16-bit value split into two registers {PSD_H [7:0], PSD_L

[7:0]}. PSD needs to be programmed less than VSYNC period,

since the counter will reset once VSYNC signal is detected. If

VSYNC is changed, PSD period and other configurations need

to be changed accordingly by bringing device in IDLE mode by

stopping integration.

Addr: 0xEA

PSD_L

Bit

Bit Name

Default

Access

Bit Description

7:0

PSD_L

0x00

This is lower byte of Proximity Start Delay time. It’s 16-bit

value split into 2 registers {PSD_H[7:0],PSD_L[7:0]}. It is in

multiples of 1.357μs.

Value

Delay Cycles

Delay Time

0x0000

Disabled

0x0001

1.357μsx1

0x0002

1.357μsx2

………

0x3FFF

16383

1.357μsx16383

………

0xFFFF

65535

1.357μsx65535

Addr: 0xEB

PSD_H

Bit

Bit Name

Default

Access

Bit Description

7:0

PSD_H

0x00

This is upper byte of Proximity Start Delay time.

See PSD_L for details.

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