56F802 datasheet(12/40 Pages) FREESCALE

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56F802 Technical Data, Rev. 9

Freescale Semiconductor

2.6 Analog-to-Digital Converter (ADC) Signals

2.7 Quad Timer Module Signals

RXD0

GPIOB1

Input

Input/

Output

Input

Receive Data (RXD0)—SCI0 receive data input

Port B GPIO—This pin is a General Purpose I/O (GPIO) pin that can

be individually programmed as an input or output pin.

After reset, the default state is SCI input.

Table 2-8 Analog to Digital Converter Signals

No. of

Pins

Signal

Name

Signal

Type

State During

Reset

Signal Description

ANA2-4

Input

ANA2-4—Analog inputs to ADC, channel 1

ANA6-7

Input

ANA6-7—Analog inputs to ADC, channel 2

VREF

Input

VREF—Analog reference voltage. Must be set to VDDA - 0.3V for

optimal performance.

Table 2-9 Quad Timer Module Signals

No. of

Pins

Signal

Name

Signal

Type

State During

Reset

Signal Description

TD1-2

GPIOA1-2

Input/

Output

Input/

Output

Input

TD1-2—Timer D Channel 1-2

Port A GPIO—These pins are General Purpose I/O (GPIO) pins that

can be individually programmed as input or output pins.

After reset, the default state is the quad timer input.

Table 2-7 Serial Communications Interface (SCI0) Signals (Continued)

No. of

Pins

Signal

Name

Signal

Type

State During

Reset

Signal Description

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