PAC7112 datasheet(16/56 Pages) FREESCALE

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MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2

Preliminary

Electrical Characteristics

Freescale Semiconductor

3.8.2

PLL Filter Characteristics

The oscillator provides the reference clock for the PLL as shown in Figure 3. The voltage controlled

oscillator (VCO) of the PLL is also the system clock source in self clock mode. In order to operate reliably,

care must be taken to select proper values for external loop filter components.

Figure 3. Basic PLL Functional Diagram

The procedure described below can be used to calculate the resistance and capacitance values using typical

values for K1, f1 and ich from Table 20. First, the VCO Gain at the desired VCO output frequency is

approximated by:

Eqn. 8

The phase detector relationship is given by:

Eqn. 9

ich is the current in tracking mode. The loop bandwidth fC should be chosen to fulfill the Gardner’s stability

criteria by at least a factor of 10, a typical value for the stability factor is 50.

ζ = 0.9 ensures a good transient

response.

Eqn. 10

And finally the frequency relationship is defined as:

Eqn. 11

With the above inputs the resistance can be calculated as:

Eqn. 12

The capacitance CS can now be calculated as:

Eqn. 13

Phase

Detector

REFDV+1

fREF

VDDPLL

Loop Divider

SYNR+1

fVCO

fOSC

fCMP

VCO

f1 fVCO

–

()

⋅

--------------------------

⋅

KΦ

–

⋅

ζ f

REF

⋅⋅

πζ

()

⋅

----------------------------------------

------

fREF

410

⋅

--------------

0.9

()

;

→

fVCO

fREF

----------

SYNR

()

⋅

π n f

⋅⋅⋅

KΦ

----------------------------

⋅

π f

⋅⋅

---------------------

0.516

fC R

⋅

-------------

0.9

()

;

≈

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