OXCF950 datasheet(33/66 Pages) OXFORD

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OXCF950 rev B DATA SHEET

OXFORD SEMICONDUCTOR, INC.

Name

Address

R/W

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

To access these registers LCR must be set to 0xBF

EFR

010

R/W

CTS

flow

control

RTS

Flow

control

Special

char

detect

Enhanced

mode

In-band flow control mode

XON1

100

R/W

XON Character 1

9-bit mode

Special character 1

XON2

101

R/W

XON Character 2

9-bit mode

Special Character 2

XOFF1

110

R/W

XOFF Character 1

9-bit mode

Special character 3

XOFF2

111

R/W

XOFF Character 2

9-bit mode

Special character 4

Table 25: 650 Compatible Registers

Name

Address

R/W

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

ASR 1,6,7

001

R/W 7

Idle

FIFO

size

FIFO-

SEL

Special

Char

Detect

DTR

RTS

Remote

Disabled

RFL 6

011

Number of characters in the receiver FIFO

TFL 3,6

100

Number of characters in the transmitter FIFO

ICR 3,8,9

101

R/W

Data read/written depends on the value written to the SPR prior to

the access of this register (see

Table 27)

Table 26: 950 Specific Registers

Note 1: Requires LCR[7] = 0

Note 2: Requires ACR[7] = 0

Note 3: Requires that last value written to LCR was not 0xBF

Note 4: To read this register ACR[7] must be = 0

Note 5: To read this register ACR[6] must be = 0

Note 6: Requires ACR[7] = 1

Note 7: Only bits 0 and 1 of this register can be written

Note 8: To read this register ACR[6] must be = 1

Note 9: This register acts as a window through which to read and write registers in the Indexed Control Register set

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