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LAN8804 데이터시트(PDF) 29 Page - Microchip Technology

부품명 LAN8804
상세설명  4-Port Gigabit Ethernet Transceiver with QSGMII Support
PDF  91 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN8804 데이터시트(HTML) 29 Page - Microchip Technology

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LAN8804
© 2024 Microchip Technology Inc. and its subsidiaries
DS00003591G-page 29
5.0
FUNCTIONAL DESCRIPTIONS
This section provides additional details of the major features supported by the LAN8804:
• 10BASE-T/100BASE-TX Transceiver
• 1000BASE-T Transceiver
• Auto MDI/MDIX (Pair-Swap)
• Alignment and Polarity Detection/Correction
• Wave Shaping, Slew-Rate Control, and Partial Response
• Auto-Negotiation
• LinkMD Cable Diagnostics
• Energy Efficient Ethernet (EEE)
• IEEE 802.3-2018 Frame Preemption
• Start of Frame Indication
• Signal Quality Index
• Loopbacks
• QSGMII
• MIIM (MDIO) Interface
• Interrupts
• GPIOs
• LEDs
• Coma Mode
• Power Management
• PLL/Clocks and Resets
• JTAG
5.1
10BASE-T/100BASE-TX Transceiver
5.1.1
100BASE-TX TRANSMIT
The 100BASE-TX transmit function performs parallel-to-serial conversion, 4B/5B coding, scrambling, NRZ-to-NRZI con-
version, and MLT-3 encoding and transmission.
The circuitry starts with a parallel-to-serial conversion, which converts the MII data from the MAC into a 125 MHz serial
bit stream. The data and control stream is then converted into 4B/5B coding, followed by a scrambler. The serialized
data is further converted from NRZ-to-NRZI format, and then transmitted in MLT-3 current output. The output current is
set by an external 6.04 kΩ 1% resistor for the 1:1 transformer ratio.
The output signal has a typical rise/fall time of 4 ns and complies with the ANSI TP-PMD standard regarding amplitude
balance, and overshoot. The wave-shaped 10BASE-T output is also incorporated into the 100BASE-TX transmitter.
5.1.2
100BASE-TX RECEIVE
The 100BASE-TX receiver function performs adaptive equalization, DC restoration, MLT-3-to-NRZI conversion, data
and clock recovery, NRZI-to-NRZ conversion, de-scrambling, 4B/5B decoding, and serial-to-parallel conversion.
The receiving side starts with the equalization filter to compensate for inter-symbol interference (ISI) over the twisted
pair cable. Because the amplitude loss and phase distortion are a function of the cable length, the equalizer must adjust
its characteristics to optimize performance. In this design, the variable equalizer makes an initial estimation based on
comparisons of incoming signal strength against some known cable characteristics, then tunes itself for optimization.
This is an ongoing process and self-adjusts against environmental changes such as temperature variations.
Next, the equalized signal goes through a DC-restoration and data-conversion block. The DC-restoration circuit com-
pensates for the effect of baseline wander and improves the dynamic range. The differential data conversion circuit con-
verts the MLT-3 format back to NRZI. The slicing threshold is also adaptive.



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