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S71PL129JC0 데이터시트(PDF) 73 Page - SPANSION |
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S71PL129JC0 데이터시트(HTML) 73 Page - SPANSION |
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73 / 153 page ![]() October 28, 2005 S71PL129Jxx_00_A8 S71PL129JC0/S71PL129JB0/S71PL129JA0 71 Advance Informatio n Timing Diagrams Notes: 1. PA = program address, PD = program data, DOUT is the true data at the program address 2. S29PL129J - During CE1# transitions, CE2# = VIH; During CE2# transitions, CE1# = VIH 3. S29PL129J - There are two CE# (CE1#, CE2#). In the above waveform CE# = CE1# or CE2# Figure 14. Program Operation Timings Figure 15. Accelerated Program Timing Diagram OE# WE# CE# VCC Data Addresses tDS tAH tDH tWP PD tWHWH1 tWC tAS tWPH tVCS 555h PA PA Read Status Data (last two cycles) A0h tCS Status DOUT Program Command Sequence (last two cycles) RY/BY# tRB tBUSY tCH PA WP#/ACC tVHH VHH VIL or VIH VIL or VIH tVHH |
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