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S71PL129JC0 데이터시트(PDF) 18 Page - SPANSION

부품명 S71PL129JC0
상세설명  Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM 128 Megabit (8M x 16-bit) CMOS3.0 Volt-only Simultaneous Operation, Page Mode Flash Memory
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S71PL129JC0 데이터시트(HTML) 18 Page - SPANSION

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S71PL129JC0/S71PL129JB0/S71PL129JA0
S71PL129Jxx_00_A8 October 28, 2005
Advance
Info rmation
Block Diagram
Notes:
1. RY/BY# is an open drain output.
2. For PL129J there are two CE# (CE1# and CE2#)
VCC
VSS
State
Control
Command
Register
PGM Voltage
Generator
VCC Detector
Timer
Erase Voltage
Generator
Input/Output
Buffers
Sector
Switches
Chip Enable
Output Enable
Logic
Y-Gating
Cell Matrix
Y-Decoder
X-Decoder
Data Latch
RESET#
RY/BY# (See Note)
Amax–A3
A2–A0
CE#
WE#
DQ15–DQ0
VIO
OE#



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