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S71PL129JC0 데이터시트(PDF) 108 Page - SPANSION

부품명 S71PL129JC0
상세설명  Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM 128 Megabit (8M x 16-bit) CMOS3.0 Volt-only Simultaneous Operation, Page Mode Flash Memory
PDF  153 Pages
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S71PL129JC0 데이터시트(HTML) 108 Page - SPANSION

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S71PL129JC0/S71PL129JB0/S71PL129JA0
S71PL129Jxx_00_A8 October 28, 2005
Advance
Info rmation
twc
Write cycle time
65
20k
ns
60
20k
ns
65
20k
ns
70
20k
ns
tcw
Chipselect to end
of write
55
ns
50
ns
60
ns
60
ns
tas
Address set up
Time
0
ns
0
ns
0
ns
0
ns
taw
Address valid to
end of write
55
ns
50
ns
60
ns
60
ns
tbw
UB#, LB# valid
to end of write
55
ns
50
ns
60
ns
60
ns
twp
Write pulse width
55
20k
ns
50
ns
50
ns
50
ns
twr
Write recovery
time
0
ns
0
ns
0
ns
0
ns
twhz
Write to output
High-Z
5
ns
5
ns
5
ns
5
ns
tdw
Data to write
time overlap
25
ns
20
ns
20
ns
20
ns
tdh
Data hold from
write time
0
ns
0
ns
0
ns
0
ns
tow
End write to
output Low-Z
55
5
5
tow
Write high pulse
width
7.5
ns
7.5
ns
7.5
ns
7.5
ns
tpc
Page read cycle
25
20k
ns
25
20k
ns
25
20k
ns
25
20k
ns
tpa
Page address
access time
25
ns
25
ns
25
ns
25
ns
twpc
Page write cycle
25
20k
ns
25
20k
ns
25
20k
ns
25
20k
ns
tcp
Chip select high
pulse width
10
ns
10
ns
10
ns
10
ns
Page Mode
Version
C
E
Performance Grade
-65
-60
-65
-70
Density
32Mb pSRAM
32Mb pSRAM
32Mb pSRAM
32Mb pSRAM
3 Volt
Symbol
Parameter
Min
Max
Units
Min
Max
Units
Min
Max
Units
Min
Max
Units



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