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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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S71PL129JC0 데이터시트(PDF) 121 Page - SPANSION |
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S71PL129JC0 데이터시트(HTML) 121 Page - SPANSION |
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121 / 153 page  This document contains information on one or more products under development at Spansion LLC. The information is intended to help you evaluate this product. Do not design in this product without contacting the factory. Spansion LLC reserves the right to change or discontinue work on this proposed product without notice. Publication Number S71PL129Jxx_00 Revision A Amendment 8 Issue Date October 28, 2005 Features Process Technology: CMOS Organization: x16 bit Power Supply Voltage: 2.7~3.1V Three State Outputs Compatible with Low Power SRAM Product Information Type 2 pSRAM 16Mbit (1M Word x 16-bit) 32Mbit (2M Word x 16-bit) 64Mbit (4M Word x 16-bit) 128Mbit (8M Word x 16-bit) ADVANCE INFORMATION Density VCC Range Standby (ISB1, Max.) Operating (ICC2, Max.) Mode 16Mb 2.7-3.1V 80 µA 30 mA Dual CS 16Mb 2.7-3.1V 80 µA 35 mA Dual CS and Page Mode 32Mb 2.7-3.1V 100 µA 35 mA Dual CS 32Mb 2.7-3.1V 100 µA 40 mA Dual CS and Page Mode 64Mb 2.7-3.1V TBD TBD Dual CS 64Mb 2.7-3.1V 120 µA 45 µA Dual CS and Page Mode 128Mb 2.7-3.1V TBD TBD Dual CS and Page Mode |
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