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LTC2415-1IGN 데이터시트(PDF) 15 Page - Linear Technology

부품명 LTC2415-1IGN
상세설명  24-Bit No Latency ADCs with Differential Input and Differential Reference
PDF  40 Pages
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제조업체  LINER [Linear Technology]
홈페이지  http://www.linear.com
Logo LINER - Linear Technology

LTC2415-1IGN 데이터시트(HTML) 15 Page - Linear Technology

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LTC2415/LTC2415-1
15
sn2415 24151fs
Table 2. LTC2415/LTC2415-1 Output Data Format
Differential Input Voltage
Bit 31
Bit 30
Bit 29
Bit 28
Bit 27
Bit 26
Bit 25
…
Bit 0
VIN*
EOC
DMY
SIG
MSB
VIN* ≥ 0.5 • VREF**
0
0110
0
0
…
0
0.5 • VREF** – 1LSB
0
0101
1
1
…
1
0.25 • VREF**
0
0101
0
0
…
0
0.25 • VREF** – 1LSB
0
0100
1
1
…
1
0
0
0100
0
0
…
0
–1LSB
0
0011
1
1
…
1
– 0.25 • VREF**
0
0011
0
0
…
0
– 0.25 • VREF** – 1LSB
0
0010
1
1
…
1
– 0.5 • VREF**
0
0010
0
0
…
0
VIN* < –0.5 • VREF**
0
0001
1
1
…
1
*The differential input voltage VIN = IN
+ – IN–.
**The differential reference voltage VREF = REF
+ – REF–.
Figure 3. Output Data Timing
APPLICATIO S I FOR ATIO
MSB
SIG
“0”
12
3
4
5
26
27
32
BIT 0
BIT 27
BIT 5
LSB24
BIT 28
BIT 29
BIT 30
SDO
SCK
CS
EOC
BIT 31
SLEEP
DATA OUTPUT
CONVERSION
2415 F03
Hi-Z
VCC (V)
2.5
50
0
–50
–100
–150
–200
–250
3.0
3.5
4.0
4.5
2415 F04
5.0
5.5
VREF = 2.5V
TA = 25°C
PART NO.1
PART NO.2
PART NO.3
TEMPERATURE (
°C)
–50
–103.8
–104.0
–104.2
–104.4
–104.6
–25
0
25
50
2415 F05
75
100
VCC AND VREF (V)
2.7
–103.0
–103.5
–104.0
–104.5
–105.0
–105.5
3.5
4.3
4.7
2415 F06
3.1
3.9
5.1
5.5
VCC = 5V
VREF = 5V
REF+ = 5V
REF– = GND
VIN = 0V
IN+ = GND
IN– = GND
FO = GND
TA =100°C
TA = –50°C
TA =25°C
Figure 4. Offset vs VCC
Figure 5. Offset vs Temperature
Figure 6. Offset vs VCC (VREF = VCC)
While the variation in offset with supply voltage is propor-
tional to VCC (see Figure 4), several characteristics of this
variation can be used to eliminate the effects. First, the
variation with respect to supply voltage is linear. Second,
the magnitude of the offset error decreases with de-
creased supply voltage. Third, the offset error increases
with increased reference voltage with an equal and oppo-
site magnitude to the supply voltage variation. As a result,
by tying VCC to VREF, the variation with supply can be
nearly eliminated, see Figure 6. The variation with supply
is less than 2ppm over the entire 2.7V to 5.5V supply
range.



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