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LTC2415-1IGN 데이터시트(PDF) 17 Page - Linear Technology

부품명 LTC2415-1IGN
상세설명  24-Bit No Latency ADCs with Differential Input and Differential Reference
PDF  40 Pages
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제조업체  LINER [Linear Technology]
홈페이지  http://www.linear.com
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LTC2415-1IGN 데이터시트(HTML) 17 Page - Linear Technology

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LTC2415/LTC2415-1
17
sn2415 24151fs
APPLICATIO S I FOR ATIO
Table 3a. LTC2415 State Duration
State
Operating Mode
Duration
CONVERT
Internal Oscillator
FO = LOW, (60Hz Rejection)
66.6ms, Output Data Rate
≤ 15 Readings/s
FO = HIGH, (50Hz Rejection)
80ms, Output Data Rate
≤ 12.4 Readings/s
External Oscillator
FO = External Oscillator with Frequency 10278/fEOSCs, Output Data Rate ≤ fEOSC/10278 Readings/s
fEOSC kHz (fEOSC/2560 Rejection)
SLEEP
As Long As CS = HIGH Until CS = LOW and SCK
DATA OUTPUT
Internal Serial Clock FO = LOW/HIGH, (Internal Oscillator)
As Long As CS = LOW But Not Longer Than 1.67ms (32 SCK cycles)
FO = External Oscillator with
As Long As CS = LOW But Not Longer Than 256/fEOSCms (32 SCK cycles)
Frequency fEOSC kHz
External Serial Clock with Frequency fSCK kHz
As Long As CS = LOW But Not Longer Than 32/fSCKms (32 SCK cycles)
INPUT FREQUENCY DEVIATION FROM NOTCH FREQUENCY (%)
–12
–8
–4
048
12
2415 F07a
–60
–70
–80
–90
–100
–110
–120
–130
–140
Table 3b. LTC2415-1 State Duration
State
Operating Mode
Duration
CONVERT
Internal Oscillator
FO = LOW
72.8ms, Output Data Rate
≤ 14 Readings/s
Simultaneous 50Hz/60Hz Rejection
External Oscillator
FO = External Oscillator with Frequency 10278/fEOSCs, Output Data Rate ≤ fEOSC/10278 Readings/s
fEOSC kHz (fEOSC/2560 Rejection)
SLEEP
As Long As CS = HIGH Until CS = LOW and SCK
DATA OUTPUT
Internal Serial Clock FO = LOW (Internal Oscillator)
As Long As CS = LOW But Not Longer Than 1.83ms (32 SCK cycles)
FO = External Oscillator with
As Long As CS = LOW But Not Longer Than 256/fEOSCms (32 SCK cycles)
Frequency fEOSC kHz
External Serial Clock with Frequency fSCK kHz
As Long As CS = LOW But Not Longer Than 32/fSCKms (32 SCK cycles)
Figure 7c. LTC2415/LTC2415-1
Normal Mode Rejection When Using
an External Oscillator of Frequency
fEOSC with Running Averages
Figure 7b. LTC2415-1 Normal Mode
Rejection When Using an Internal
Oscillator with Running Averages
48
50
52
54
56
58
60
62
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
2415 F07b
–80
–90
–100
–100
–120
–130
–140
DIFFERENTIAL INPUT SIGNAL FREQUENCY
DEVIATION FROM NOTCH FREQUENCY fEOSC/2560(%)
–12
–8
–4
048
12
2415 F07c
–80
–85
–90
–95
–100
–105
–110
–115
–120
–125
–130
–135
–140
Figure 7a. LTC2415/LTC2415-1 Normal Mode
Rejection When Using an External Oscillator
of Frequency fEOSC without Running Averages
state and the converter is in the Internal SCK mode, the
serial clock duty cycle may be affected but the serial data
stream will remain valid.
Table 3b summarizes the duration of each state and the
achievable output data rate as a function of FO.
Serial Interface Pins
The LTC2415/LTC2415-1 transmit the conversion results
and receive the start of conversion command through a
synchronous 3-wire interface. During the conversion and
sleep states, this interface can be used to assess the
converter status and during the data output state it is used
to read the conversion result.



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