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STPMIC25BPQR 데이터시트(PDF) 82 Page - STMicroelectronics

부품명 STPMIC25BPQR
상세설명  Highly integrated power management IC for microprocessor units
PDF  145 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
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STPMIC25BPQR 데이터시트(HTML) 82 Page - STMicroelectronics

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6.3.7
Fail-safe overcurrent protection control register 1 (FS_OCP_CR1)
Table 48. FS_OCP_CR1
7
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
•
Address: 0x16
•
Default: 0xXX where X depends on the value programmed in the NVM
•
Description: Fail-safe overcurrent protection control register 1 (see Section 5.4.9). This register is initialized
to the default value in the CHECK&LOAD state.
[7]
FS_OCP_REFDDR: REFDDR OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[6]
FS_OCP_BUCK7: BUCK7 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[5]
FS_OCP_BUCK6: BUCK6 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[4]
FS_OCP_BUCK5: BUCK5 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[3]
FS_OCP_BUCK4: BUCK4 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[2]
FS_OCP_BUCK3: BUCK3 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[1]
FS_OCP_BUCK2: BUCK2 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[0]
FS_OCP_BUCK1: BUCK1 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
STPMIC25
Register descriptions
DS14278 - Rev 3
page 82/145



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