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STPMIC25BPQR 데이터시트(PDF) 126 Page - STMicroelectronics

부품명 STPMIC25BPQR
상세설명  Highly integrated power management IC for microprocessor units
PDF  145 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
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STPMIC25BPQR 데이터시트(HTML) 126 Page - STMicroelectronics

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6.8.22
NVM fail-safe overcurrent protection shadow register 1 (NVM_FS_OCP_SHR1)
Table 102. NVM_FS_OCP_SHR1
7
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
•
Address: 0xAF
•
Default: Depends on the PMIC part number
•
Description: NVM fail-safe overcurrent protection shadow register 1 (see Section 5.4.9).
[7]
NVM_FS_OCP_REFDDR: REFDDR OCP management mode selection.
0: OCP Hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[6]
NVM_FS_OCP_BUCK7: BUCK7 OCP management mode selection.
0: OCP Hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[5]
NVM_FS_OCP_BUCK6: BUCK6 OCP management mode selection.
0: OCP Hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[4]
NVM_FS_OCP_BUCK5: BUCK5 OCP management mode selection.
0: OCP Hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[3]
NVM_FS_OCP_BUCK4: BUCK4 OCP management mode selection.
0: OCP Hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[2]
NVM_FS_OCP_BUCK3: BUCK3 OCP management mode selection.
0: OCP Hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[1]
NVM_FS_OCP_BUCK2: BUCK2 OCP management mode selection.
0: OCP Hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[0]
NVM_FS_OCP_BUCK1: BUCK1 OCP management mode selection.
0: OCP Hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
STPMIC25
Register descriptions
DS14278 - Rev 3
page 126/145



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