전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

24C32A-/P 데이터시트(PDF) 5 Page - Microchip Technology

부품명 24C32A-/P
상세설명  32K 5.0V I2CSerial EEPROM
PDF  12 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

24C32A-/P 데이터시트(HTML) 5 Page - Microchip Technology

  24C32A-/P Datasheet HTML 1Page - Microchip Technology 24C32A-/P Datasheet HTML 2Page - Microchip Technology 24C32A-/P Datasheet HTML 3Page - Microchip Technology 24C32A-/P Datasheet HTML 4Page - Microchip Technology 24C32A-/P Datasheet HTML 5Page - Microchip Technology 24C32A-/P Datasheet HTML 6Page - Microchip Technology 24C32A-/P Datasheet HTML 7Page - Microchip Technology 24C32A-/P Datasheet HTML 8Page - Microchip Technology 24C32A-/P Datasheet HTML 9Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 12 page
background image
 2004 Microchip Technology Inc.
DS21163E-page 5
24C32A
3.6
Device Addressing
A control byte is the first byte received following the
start condition from the master device. The control byte
consists of a 4-bit control code; for the 24C32A this is
set as 1010 binary for read and write (R/W) operations.
The next three bits of the control byte are the device
select bits (A2, A1, A0). They are used by the master
device to select which of the eight devices are to be
accessed. These bits are in effect the three most signif-
icant bits of the word address. The last bit of the control
byte defines the operation to be performed. When set
to a one a read operation is selected, and when set to
a zero a write operation is selected. The next two bytes
received define the address of the first data byte
(Figure 3-3). Because only A11...A0 are used, the
upper four address bits must be zeros. The most signif-
icant bit of the most significant byte of the address is
transferred first.
FIGURE 3-2:
CONTROL BYTE
ALLOCATION
R/W
A
1
0
1
0
A2
A1
A0
READ/WRITE
START
SLAVE ADDRESS
Following the start condition, the 24C32A monitors the
SDA bus checking the device type identifier being
transmitted. Upon receiving a 1010 code and appropri-
ate device select bits, the slave device outputs an
acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the 24C32A will select a read or
write operation.
Operation
Control
Code
Device Select
R/W
Read
1010
Device Address
1
Write
1010
Device Address
0
FIGURE 3-3:
ADDRESS SEQUENCE BIT ASSIGNMENTS
1
010
A
2
A
1
A
0 R/W
0
000
A
11
A
10
A
9
A
7
A
0
A
8
••
•
•
•
•
SLAVE
ADDRESS
DEVICE
SELECT
BUS
CONTROL BYTE
ADDRESS BYTE 1
ADDRESS BYTE 0



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com