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VL53L4ED 데이터시트(PDF) 30 Page - STMicroelectronics |
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VL53L4ED 데이터시트(HTML) 30 Page - STMicroelectronics |
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30 / 39 page ![]() 11 Packing and labeling 11.1 Product marking A two line product marking is applied on the backside of the module (on the substrate). The first line is the silicon product code, and the second line, the internal tracking code. 11.2 Inner box labeling The labeling follows the STMicroelectronics' standard packing acceptance specification. The following information is on the inner box label: • Assembly site • Sales type • Quantity • Trace code • Marking • Bulk ID number 11.3 Packing At customer level, it is recommended to mount the device in a clean environment to avoid foreign material deposition. To help avoid any foreign material contamination at product assembly level, the module is shipped in a tape and reel format. The tape is described in Section 11.4: Tape outline drawing. The packing is vacuum sealed and includes a desiccant. VL53L4ED Packing and labeling DS14256 - Rev 3 page 30/39 |
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