| 전자부품 데이터시트 검색엔진 |
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CDCE949 데이터시트(PDF) 3 Page - Texas Instruments |
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CDCE949 데이터시트(HTML) 3 Page - Texas Instruments |
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3 / 31 page ![]() www.ti.com EEPROM Xin/CLK Xout V DD GND Vctr V DDOUT VCXO XO LVCMOS Y2 Y1 Y3 LV CMOS Pdiv1 10-Bit Y4 Y5 Y6 Y7 Y8 Y9 LV CMOS Pdiv9 7-Bit Pdiv8 7-Bit LV CMOS LV CMOS Pdiv7 7-Bit Pdiv6 7-Bit LV CMOS LV CMOS Pdiv5 7-Bit Pdiv4 7-Bit LV CMOS LV CMOS Pdiv3 7-Bit Pdiv2 7-Bit LV CMOS Programming and SDA/SCL Register InputClock PLL Bypass PLL 1 withSSC PLL Bypass PLL 2 withSSC PLL Bypass PLL 3 withSSC PLL Bypass PLL 4 withSSC S0 S1/SDA S2/SCL ABSOLUTE MAXIMUM RATINGS CDCE949 CDCEL949 SCAS844 – JUNE 2007 FUNCTIONAL BLOCK DIAGRAM over operating free-air temperature range (unless otherwise noted) (1) VALUE UNIT VDD Supply voltage range –0.5 to 2.5 V VI Input voltage range(2) –0.5 to VDD + 0.5 V VO Output voltage range(2) –0.5 to VDDOUT + 0.5 V II Input current (Vi < 0, Vi > VDD) 20 mA IO Continuous output current 50 mA Tstg Storage temperature range –65 to 150 °C TJ Maximum junction temperature 125 °C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. (2) The input and output negative voltage ratings may be exceeded if the input and output clamp–current ratings are observed. 3 Submit Documentation Feedback |
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