DSPIC33FJ12MC02ESS datasheet(59/284 Pages) MICROCHIP

59 / 284 page

Preliminary

DS70265B-page 57

dsPIC33FJ12MC201/202

TABLE 5-1:

RESET FLAG BIT OPERATION

bit 1

BOR: Brown-out Reset Flag bit

1 = A Brown-out Reset has occurred

0 = A Brown-out Reset has not occurred

bit 0

POR: Power-on Reset Flag bit

1 = A Power-up Reset has occurred

0 = A Power-up Reset has not occurred

RCON: RESET CONTROL REGISTER(1) (CONTINUED)

Note 1:

All of the Reset status bits can be set or cleared in software. Setting one of these bits in software does not

cause a device Reset.

If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the

SWDTEN bit setting.

Flag Bit

Setting Event

Clearing Event

TRAPR (RCON<15>)

Trap conflict event

POR, BOR

IOPUWR (RCON<14>)

Illegal opcode or uninitialized

W register access

POR, BOR

CM (RCON<9>)

Configuration mismatch

POR, BOR

EXTR (RCON<7>)

MCLR Reset

POR

SWR (RCON<6>)

RESET instruction

POR, BOR

WDTO (RCON<4>)

WDT time-out

PWRSAV instruction, POR, BOR,

CLRWDT instruction

SLEEP (RCON<3>)

PWRSAV #SLEEP instruction

POR, BOR

IDLE (RCON<2>)

PWRSAV #IDLE instruction

POR, BOR

BOR (RCON<1>

BOR

—

POR (RCON<0>)

POR

—

Note: All Reset flag bits can be set or cleared by the user software.

DSPIC33FJ12MC02ESS 데이터시트(PDF) 59 Page - Microchip Technology

DSPIC33FJ12MC02ESS 데이터시트(HTML) 59 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL