1998 Jul 03

13

Philips Semiconductors

Product specification

TV and VTR stereo/dual sound processor

TDA9840

Notes

1. Input control amplifiers with

2. Input control amplifiers with

4. Without de-emphasis capacitors with respect to nominal gain.

5. In dual mode: A (B)-signal into B (A) channel.

In stereo mode: R-signal into left channel; L-signal = 0.

6. Test procedure tbf (same as TDA9855).

noise.

9. Identification window is defined as total pull-in frequency range (lower plus upper side) of identification PLL (steady

detection) plus window increase due to integrator (fluctuating detection).

clock frequency

0

−

100

kHz

LOW level input voltage

−0.3

−

1.5

V

HIGH level input voltage

3.0

−

5.5

V

timing LOW period

4.7

−−

µs

timing HIGH period

4.0

−−

µs

rise time

−−

1

µs

fall time

−−

0.3

µs

LOW level input current

−−

−10

µA

HIGH level input current

−−

10

µA

LOW level input voltage

−0.3

−

1.5

V

HIGH level input voltage

3.0

−

5.5

V

rise time

−−

1

µs

fall time

−−

0.3

µs

data set-up time

0.25

−−

µs

LOW level input current

−−

−10

µA

LOW level output current

−3

−−

mA

HIGH level input current

−−

10

µA

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT