PIC18F44J10-ESLASHML datasheet(284/358 Pages) MICROCHIP

부품명	PIC18F44J10-E/ML

상세설명	28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology

PDF	358 Pages

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PIC18F45J10 FAMILY

DS39682C-page 282

Preliminary

XORWF

Exclusive OR W with f

Syntax:

XORWF

f {,d {,a}}

Operands:

≤ f ≤ 255

∈ [0,1]

Operation:

(W) .XOR. (f)

→ dest

Status Affected:

N, Z

Encoding:

0001

10da

ffff

Description:

Exclusive OR the contents of W with

in W. If ‘d’ is ‘1’, the result is stored back

in the register ‘f’ (default).

If ‘a’ is ‘0’, the Access Bank is selected.

If ‘a’ is ‘1’, the BSR is used to select the

GPR bank (default).

If ‘a’ is ‘0’ and the extended instruction

set is enabled, this instruction operates

in Indexed Literal Offset Addressing

mode whenever f

≤ 95 (5Fh). See

Section 21.2.3 “Byte-Oriented and

Bit-Oriented Instructions in Indexed

Literal Offset Mode” for details.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

Process

Data

Write to

destination

Example:

XORWF

REG, 1, 0

Before Instruction

REG

AFh

B5h

After Instruction

REG

1Ah

B5h

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