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PIC18F44J10-E/ML 데이터시트(PDF) 288 Page - Microchip Technology

부품명 PIC18F44J10-E/ML
상세설명  28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology
PDF  358 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F44J10-E/ML 데이터시트(HTML) 288 Page - Microchip Technology

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PIC18F45J10 FAMILY
DS39682C-page 286
Preliminary
© 2007 Microchip Technology Inc.
MOVSS
Move Indexed to Indexed
Syntax:
MOVSS [zs], [zd]
Operands:
0
≤ zs ≤ 127
0
≤ zd ≤ 127
Operation:
((FSR2) + zs) → ((FSR2) + zd)
Status Affected:
None
Encoding:
1st word (source)
2nd word (dest.)
1110
1111
1011
xxxx
1zzz
xzzz
zzzzs
zzzzd
Description
The contents of the source register are
moved to the destination register. The
addresses of the source and destination
registers are determined by adding the
7-bit literal offsets ‘zs’ or ‘zd’,
respectively, to the value of FSR2. Both
registers can be located anywhere in
the 4096-byte data memory space
(000h to FFFh).
The MOVSS instruction cannot use the
PCL, TOSU, TOSH or TOSL as the
destination register.
If the resultant source address points to
an indirect addressing register, the
value returned will be 00h. If the
resultant destination address points to
an indirect addressing register, the
instruction will execute as a NOP.
Words:
2
Cycles:
2
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Determine
source addr
Determine
source addr
Read
source reg
Decode
Determine
dest addr
Determine
dest addr
Write
to dest reg
Example:
MOVSS [05h], [06h]
Before Instruction
FSR2
=
80h
Contents
of 85h
=
33h
Contents
of 86h
=
11h
After Instruction
FSR2
=
80h
Contents
of 85h
=
33h
Contents
of 86h
=
33h
PUSHL
Store Literal at FSR2, Decrement FSR2
Syntax:
PUSHL k
Operands:
0
≤ k ≤ 255
Operation:
k
→ (FSR2),
FSR2 – 1
→ FSR2
Status Affected:
None
Encoding:
1111
1010
kkkk
kkkk
Description:
The 8-bit literal ‘k’ is written to the data
memory address specified by FSR2. FSR2
is decremented by 1 after the operation.
This instruction allows users to push values
onto a software stack.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read ‘k’
Process
data
Write to
destination
Example:
PUSHL 08h
Before Instruction
FSR2H:FSR2L
=
01ECh
Memory (01ECh)
=
00h
After Instruction
FSR2H:FSR2L
=
01EBh
Memory (01ECh)
=
08h



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