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PIC18F4685-I/SP 데이터시트(PDF) 270 Page - Microchip Technology

부품명 PIC18F4685-I/SP
상세설명  28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
PDF  484 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F4685-I/SP 데이터시트(HTML) 270 Page - Microchip Technology

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PIC18F2682/2685/4682/4685
DS39761B-page 268
Preliminary
© 2007 Microchip Technology Inc.
The module is enabled by setting the HLVDEN bit.
Each time that the HLVD module is enabled, the
circuitry requires some time to stabilize. The IRVST bit
is a read-only bit and is used to indicate when the circuit
is stable. The module can only generate an interrupt
after the circuit is stable and IRVST is set.
The VDIRMAG bit determines the overall operation of
the module. When VDIRMAG is cleared, the module
monitors for drops in VDD below a predetermined set
point. When the bit is set, the module monitors for rises
in VDD above the set point.
22.1
Operation
When the HLVD module is enabled, a comparator uses
an internally generated reference voltage as the set
point. The set point is compared with the trip point,
where each node in the resistor divider represents a
trip point voltage. The “trip point” voltage is the voltage
level at which the device detects a high or low-voltage
event, depending on the configuration of the module.
When the supply voltage is equal to the trip point, the
voltage tapped off of the resistor array is equal to the
internal reference voltage generated by the voltage
reference module. The comparator then generates an
interrupt signal by setting the HLVDIF bit.
The trip point voltage is software programmable to any
one of sixteen values. The trip point is selected
by programming
the
HLVDL3:HLVDL0
bits
(HLVDCON<3:0>).
The HLVD module has an additional feature that allows
the user to supply the trip voltage to the module from an
external source. This mode is enabled when bits
HLVDL3:HLVDL0 are set to ‘1111’. In this state, the
comparator input is multiplexed from the external input
pin, HLVDIN. This gives users flexibility because it
allows them to configure the High/Low-Voltage Detect
interrupt to occur at any voltage in the valid operating
range.
FIGURE 22-1:
HLVD MODULE BLOCK DIAGRAM (WITH EXTERNAL INPUT)
VDD
HLVDEN
HLVDCON
HLVDIN
HLVDL3:HLVDL0
Register
HLVDIN
VDD
Externally Generated
Trip Point
Set HLVDIF
HLVDEN
BOREN
Internal Voltage
Reference
VDIRMAG



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