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PIC16F010-E/MCSQTP 데이터시트(PDF) 90 Page - Microchip Technology

부품명 PIC16F010-E/MCSQTP
상세설명  8/14-Pin, 8-Bit Flash Microcontroller
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PIC12F510/16F506
DS41268C-page 88
Preliminary
© 2007 Microchip Technology Inc.
13.3
DC Characteristics: PIC12F510/16F506 (Industrial, Extended)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise specified)
Operating Temperature
-40°C
≤ TA ≤ +85°C (industrial)
-40°C
≤ TA ≤ +125°C (extended)
Param
No.
Sym
Characteristic
Min
Typ†
Max
Units
Conditions
VIL
Input Low Voltage
I/O ports
D030
with TTL buffer
VSS
—0.8V
V
For 4.5
≤ VDD ≤ 5.5V
D030A
VSS
—0.15 VDD
V
otherwise
D031
with Schmitt Trigger buffer
VSS
—0.15 VDD
V
D032
MCLR, T0CKI
VSS
—0.15 VDD
V
D033
OSC1 (in EXTRC), EC(1)
VSS
—0.15 VDD
V
D033
OSC1 (in HS)
VSS
—0.3 VDD
V
D033
OSC1 (in XT and LP)
VSS
—0.3 VDD
V
VIH
Input High Voltage
I/O ports
—
D040
with TTL buffer
2.0
—
VDD
V4.5
≤ VDD ≤ 5.5V
D040A
0.25 VDD
—VDD
V
Otherwise
+ 0.8V
D041
with Schmitt Trigger buffer
0.85 VDD
—VDD
V
For entire VDD range
D042
MCLR, T0CKI
0.85 VDD
—VDD
V
D043
OSC1 (in EXTRC), EC(1)
0.85 VDD
—VDD
V
D043
OSC1 (in HS)
0.7 VDD
—VDD
V
D043
OSC1 (in XT and LP)
1.6
—
VDD
V
D070
IPUR
GPIO/PORTB Weak Pull-up Current
TBD
250
TBD
μAVDD = 5V, VPIN = VSS
IIL
Input Leakage Current(2), (3)
D070
GPIO Weak Pull-up Current (GP3)
TBD
225
TBD
μAVDD = 5V
VPIN = 0V
D060
I/O ports
—
—
±1
μA
Vss
≤ VPIN ≤ VDD, Pin at high-impedance
D061A
GP3/RB3/MCLR(4)
——
±5
μA
Vss
≤ VPIN ≤ VDD
D063
OSC1
—
—
±5
μA
Vss
≤ VPIN ≤ VDD, XT, HS and LP oscillator
configuration
Output Low Voltage
D080
VOL
I/O ports/CLKOUT
—
—
0.6
V
IOL = 8.5 mA, VDD = 4.5V, –40
°C to +85°C
D080A
—
—
0.6
V
IOL = 7.0 mA, VDD = 4.5V, –40
°C to +125°C
D083
OSC2
—
—
0.6
V
IOL = 1.6 mA, VDD = 4.5V, –40
°C to +85°C
D083A
—
—
0.6
V
IOL = 1.2 mA, VDD = 4.5V, –40
°C to +125°C
Output High Voltage
D090
VOH
I/O ports/CLKOUT(3)
VDD – 0.7
—
—
V
IOH = -3.0 mA, VDD = 4.5V, –40
°C to +85°C
D090A
VDD – 0.7
—
—
V
IOH = -2.5 mA, VDD = 4.5V, –40
°C to +125°C
D092
OSC2
VDD – 0.7
—
—
V
IOH = -1.3 mA, VDD = 4.5V, –40
°C to +85°C
D092A
VDD – 0.7
—
—
V
IOH = -1.0 mA, VDD = 4.5V, –40
°C to +125°C
Capacitive Loading Specs on Output Pins
D100
COSC2
OSC2 pin
—
—
15
pF
In XT, HS and LP modes when external
clock is used to drive OSC1.
D101
CIO
All I/O pins
—
—
50
pF
Legend:
TBD = To be determined.
†
Data in “Typ” column is at 5V, 25
°C unless otherwise stated. These parameters are for design guidance only and are not tested.
Note
1:
In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that the PIC12F510/16F506 be
driven with external clock in RC mode.
2:
The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating
conditions. Higher leakage current may be measured at different input voltages.
3:
Negative current is defined as coming out of the pin.
4:
This specification applies when GP3/MCLR is configured as an input with pull-up disabled. The leakage current of the MCLR circuit is
higher than the standard I/O logic.



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