M24M02E-F datasheet(7/54 Pages) STMICROELECTRONICS

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4.2

Configurable device address register (CDA)

The (CDA) is an 8-bit register that allows the user to define a configurable device address (C2) and includes a

specific bit, named device address lock (DAL), to permanently freeze the configurable device address register.

This register can be read and written by issuing the read or write configurable device address instruction. These

instructions use the same protocol and format as the random address read or page write (from/into memory array)

except for the following differences (refer to Table 9, Table 10, and Table 11):

•

Device type identifier = 1011

•

MSB address bits A15, A14, and A13 must be equal to 110

•

MSB address bits from A12 to A8 are don't care

•

LSB address bits from A7 to A0 are don't care

C2 and DAL are defining the chip enable address in the device select code and the device address lock. These

bits can be written and reconfigured with a write command.

At power-up or after reprogramming, the device loads the last configuration of C2 and DAL values. To prevent

unwanted change of configurable device address bits, the M24M02E-F proposes to protect the CDA register

permanently freezing it in read-only mode. The update of the CDA register is disabled (read-only) when the DAL

bit is set to 1 (DAL = 1).

In the same way, the update of the CDA register is enabled when the DAL bit is set to 0 (DAL = 0). Sending more

than one byte during a write configurable device address command aborts the write cycle (CDA register content

does not change).

Note:

•

Updating the DAL bit from 0 to 1 is an irreversible action: the C2 and DAL bits cannot be updated

anymore.

•

If the write control input (WC) is driven high, or if the DAL bit is set to 1 the write configurable device

address command is not executed, the accompanying data byte is not acknowledged, as shown in

Figure 7, and the write cycle does not start.

The description of the configurable device address register is given in Table 4.

Table 4. Configurable device address register

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

X (1)

DAL

1. X = Don’t care bits. Read as 0.

Note:

The factory default value is 00000000.

For devices delivered with preprogrammed device address:

•

The default value of C2 is given in Table 6. Preprogrammed device address.

•

DAL is set to 1

Table 5. Configurable device address register description

Bit

Function

Bits b7 to b4, b1, and b2

Don’t care bits. Read as 0.

(b7, b6, b5, b4, b2, b1) = (0, 0, 0, 0, 0, 0)

Bit b3

C2: Configurable device address bit.

b3 is used to configure up to two possibilities of chip enable address:

•

b3 = 0: the chip enable address is 0

•

b3 = 1: the chip enable address is 1

Bit b0

DAL: Device address lock bit.

b0 locks the CDA register in read-only mode:

•

b0 = 0: bits b3 and b0 can be modified

•

b0 = 1: bits b3 and b0 cannot be modified and therefore the CDA register is frozen

Note: Bits b3 and b0 can be updated (if b0 = 0) in the same write instruction. Setting b0 from 0

to 1 is an irreversible action.

M24M02E-F

Device features

DS14157 - Rev 2

page 7/54

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