M24M02E-F datasheet(8/54 Pages) STMICROELECTRONICS

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If the M24M02E-F is delivered with the preprogrammed device address, the configurable device address register

becomes locked at factory delivery and can only be read. The C2 is set as specified in Table 6. Preprogrammed

device address, and the DAL bit is set to 1.

The corresponding commercial product number with the preprogrammed device address and availability are given

in Table 6.

Table 6. Preprogrammed device address

Commercial product number(1)

Device address C2

Availability

M24M02E-Fxx6T1

On demand

1. xx in the part number varies by package.

4.3

Software write protection register (SWP)

The software write protection (SWP) register is a nonvolatile 8-bit register that allows the user to protect a specific

area of the memory against the write instruction. The SWP offers four nonvolatile bits to user configuration:

•

Two bits for setting the size of the write-protected memory, identified as the block protection bits (BP0,

BP1).

•

One bit to enable or disable the write protection of the desired area, identified as the write protect activation

(WPA) bit.

•

One bit to definitively freeze the SWP register in read-only modeis , identified as the write protection lock

(WPL) bit.

This register can be read and written by issuing the read or write software write protection register instructions.

These instructions use the same protocol and format as the random address read or page write (from/into

memory array) except for the following differences (refer to Table 9, Table 10, and Table 11:

•

Device type identifier = 1011

•

MSB address bits A15, A14, and A13 must be equal to 101

•

MSB address bits from A12 to A8 are don't care

•

LSB address bits from A7 to A0 are don't care

BP1 and BP0 are the block protection bits. WPL is the write protect lock bit and WPA is the write protect activation

bit. These bits can be written and reconfigured with a write command. At power-up, the device loads the last

configuration of the SWP register value.

The user can update the SWP register as often as the WPL bit stays at 0. Writing more than one byte discard the

write cycle (software write protection register content is not changed).

To prevent unwanted change of software write protection register bits, the M24M02E-F proposes to protect the

SWP register, freezing it permanently in read-only mode. The update of the SWP register is disabled (read only)

when the WPL bit is set to 1 (WPL = 1). In the same way, the update of the SWP register is enabled when the

WPL bit is set to 0 (WPL = 0).

When WPL is set to 1 and in case of write software write protection register, the device select and address bytes

are acknowledged, data byte is not acknowledged and the write cycle does not start.

Note:

•

Updating the WPL bit from 0 to 1 is an irreversible action: the WPA, BP1, BP0, and WPL bits cannot be

updated any more

•

If the write control input (WC) is driven high or if the WPL bit is set to 1, the write command on the

software write protection register is not executed and the accompanying data byte is not acknowledged,

as shown in Figure 11. Write SWP register (data write inhibited).

The description of the software write protection register is given in the following table:

Table 7. Software write protection register values

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

X (1)

WPA

BP1

BP0

WPL

1. X = Don’t care bits. Read as 0.

Note:

The factory default value is 00000000.

M24M02E-F

Device features

DS14157 - Rev 2

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