PIC18F258-ESLASHLSQTP datasheet(56/402 Pages) MICROCHIP

56 / 402 page

PIC18FXX8

DS41159E-page 54

4.10

Access Bank

The Access Bank is an architectural enhancement that

is very useful for C compiler code optimization. The

techniques used by the C compiler are also useful for

programs written in assembly.

This data memory region can be used for:

• Intermediate computational values

• Local variables of subroutines

• Faster context saving/switching of variables

• Common variables

• Faster evaluation/control of SFRs (no banking)

The Access Bank is comprised of the upper 160 bytes

in Bank 15 (SFRs) and the lower 96 bytes in Bank 0.

These two sections will be referred to as Access Bank

High and Access Bank Low, respectively. Figure 4-6

indicates the Access Bank areas.

A bit in the instruction word specifies if the operation is

to occur in the bank specified by the BSR register or in

the Access Bank.

When forced in the Access Bank (a = 0), the last

address in Access Bank Low is followed by the first

address in Access Bank High. Access Bank High maps

most of the Special Function Registers so that these

registers can be accessed without any software

overhead.

4.11

Bank Select Register (BSR)

The need for a large general purpose memory space

dictates a RAM banking scheme. The data memory is

partitioned into sixteen banks. When using direct

addressing, the BSR should be configured for the

desired bank.

BSR<3:0> holds the upper 4 bits of the 12-bit RAM

address. The BSR<7:4> bits will always read ‘0’s and

writes will have no effect.

A MOVLB instruction has been provided in the

instruction set to assist in selecting banks.

If the currently selected bank is not implemented, any

read will return all ‘0’s and all writes are ignored. The

Status register bits will be set/cleared as appropriate for

the instruction performed.

Each Bank extends up to FFh (256 bytes). All data

memory is implemented as static RAM.

A MOVFF instruction ignores the BSR since the 12-bit

addresses are embedded into the instruction word.

Section 4.12 “Indirect Addressing, INDF and FSR

Registers” provides a description of indirect address-

ing, which allows linear addressing of the entire RAM

space.

FIGURE 4-7:

DIRECT ADDRESSING

Note

1: For register file map detail, see Table 4-1.

2: The access bit of the instruction can be used to force an override of the selected bank (BSR<3:0>) to the

registers of the Access Bank.

3: The MOVFF instruction embeds the entire 12-bit address in the instruction.

Data

Memory(1)

Direct Addressing

Bank Select(2)

Location Select(3)

BSR<3:0>

From Opcode(3)

00h

01h

0Eh

0Fh

Bank 0

Bank 1

Bank 14

Bank 15

1FFh

100h

0FFh

000h

0EFFh

0E00h

0FFFh

0F00h

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