CS5101A datasheet(32/39 Pages) CIRRUS

32 / 39 page

CS5101A CS5102A

DS45F6

cies. The proprietary architecture of the CS5101A

and CS5102A avoids applying the input voltage

across a sampling switch, thus avoiding any “aper-

ture window” effects. The second type of aperture

jitter, due to component noise, assumes a random

nature. With only 100 ps peak-to-peak aperture jit-

ter, the CS5101A and CS5102A can process full-

scale signals up to 1/2 the throughput frequency

without significant errors due to aperture jitter.

Figure 25. Power Supply Rejection

7.6

Power Supply Rejection

The power supply rejection performance of the

CS5101A and CS5102A is enhanced by the on-

chip self-calibration and an “auto-zero” process.

Drifts in power supply voltages at frequencies less

than the calibration rate have negligible effect on

the device's accuracy. This is because the

CS5101A and CS5102A adjust their offset to within

a small fraction of an LSB during calibration. Above

the calibration frequency the excellent power sup-

ply rejection of the internal amplifiers is augmented

by an auto-zero process. Any offsets are stored on

the capacitor array and are effectively subtracted

once conversion is initiated. Figure 25 shows pow-

er supply rejection of the CS5101A and CS5102A

in the bipolar mode with the analog input grounded

and a 300 mV p-p ripple applied to each supply.

Power supply rejection improves by 6 dB in the un-

ipolar mode.

Pow er Sup ply R ipp le Frequ ency

1 kH z

10 kH z

1 00 kH z

1 M H z

CS5101A 데이터시트(PDF) 32 Page - Cirrus Logic