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ICS1893CF 데이터시트(PDF) 108 Page - Integrated Circuit Systems |
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ICS1893CF 데이터시트(HTML) 108 Page - Integrated Circuit Systems |
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108 / 126 page ![]() ICS1893CF, Rev. F, 03/01/07 Mar. 2007 108 Chapter 9 DC and AC Operating Conditions ICS1893CF Data Sheet - Release Copyright © 2007, Integrated Device Technology, Inc. All rights reserved. 9.5.6 100M/MII Media Independent Interface: Synchronous Receive Timing Table 9-13 lists the significant time periods for the MII / 100M Stream Interface synchronous receive timing. The time periods consist of timings of signals on the following pins: • RXCLK • RXD[3:0] • RXDV • RXER Figure 9-7 shows the timing diagram for the time periods. Figure 9-7. MII Interface Synchronous Receive Timing Diagram Table 9-13. MII Interface: Synchronous Receive Timing Time Period Parameter Min. Typ. Max. Units t1 RXD[3:0], RXDV, and RXER Setup to RXCLK Rise 10.0 – – ns t2 RXD[3:0], RXDV, and RXER Hold after RXCLK Rise 10.0 – – ns t1 t2 RXCLK RXD[3:0] RXDV RXER |
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