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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ICS1893CF 데이터시트(PDF) 115 Page - Integrated Circuit Systems |
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ICS1893CF 데이터시트(HTML) 115 Page - Integrated Circuit Systems |
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115 / 126 page  Chapter 9 DC and AC Operating Conditions ICS1893CF, Rev. F, 03/01/07 Mar. 2007 115 ICS1893CF Data Sheet Rev. F - Release Copyright © 2007, Integrated Device Technology, Inc. All rights reserved. 9.5.13 100M MII Media Independent Interface: Receive Latency Table 9-20 lists the significant time periods for the 100M MII / 100M Stream Interface receive latency. The time periods consist of timings of signals on the following pins: • TP_RX (that is, TP_RXP and TP_RXN) • RXCLK • RXD (that is, RXD[3:0]) Figure 9-14 shows the timing diagram for the time periods. Figure 9-14. 100M MII / 100M Stream Interface: Receive Latency Timing Diagram Table 9-20. 100M MII / 100M Stream Interface Receive Latency Timing Time Period Parameter Conditions Min. Typ. Max. Units t1 First Bit of /J/ into TP_RX to /J/ on RXD 100M MII – 16 17 Bit times RXCLK TP_RX† † Shown unscrambled. RXD t1 |
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