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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PM7366-PI 데이터시트(PDF) 218 Page - PMC-Sierra, Inc |
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PM7366-PI 데이터시트(HTML) 218 Page - PMC-Sierra, Inc |
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218 / 286 page  RELEASED PM7366 FREEDM-8 DATA SHEET PMC-1970930 ISSUE 4 FRAME ENGINE AND DATA LINK MANAGER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 205 unchannelised and the E1 register bit is ignored. TCLK[n] is gapped during non-data bytes. All data bits are treated as a contiguous stream with arbitrary byte alignment. E1: The E1 frame structure select bit (E1) configures the corresponding link for channelised E1 operation when CEN is set high. TCLK[n] is held quiescent during the FAS and NFAS framing bytes. The most significant bit of time-slot 1 is placed on TD[n] on the last falling edge of TCLK[n] ahead of the extended quiescent period. Link data is present at time-slots 1 to 31. When E1 is set low and CEN is set high, the corresponding link is configured for channelised T1 operation. TCLK[n] is held quiescent during the framing bit. The m.s.b. of time-slot 1 is placed on TD[n] on the last falling edge of TCLK[n] ahead of the extended low period. Link data is present at time-slots 1 to 24. E1 is ignored when CEN is set low. |
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