PM7366-PI datasheet(100/286 Pages) PMC

100 / 286 page

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PM7366 FREEDM-8

DATA SHEET

PMC-1970930

ISSUE 4

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Trigger

Bit

Type

Function

Default

Bit 31 to

Bit 16

Unused

XXXXH

Bit 15

Unused

Bit 14

Unused

Bit 13

Unused

Bit 12

Unused

Bit 11

Unused

Bit 10

Unused

Bit 9

Unused

Bit 8

Unused

Bit 7

Unused

Bit 6

Unused

Bit 5

Unused

Bit 4

Unused

Bit 3

Unused

Bit 2

Unused

Bit 1

TBDA

Bit 0

SYSCLKA

This register provides activity monitoring on FREEDM-8 clock inputs and BERT port input. When

a monitored input makes a low to high transition, the corresponding register bit is set high. The bit

will remain high until this register is read, at which point, all the bits in this register are cleared. A

lack of transitions is indicated by the corresponding register bit reading low. This register should

be read periodically to detect for stuck at conditions.

Writing to this register delimits the accumulation intervals in the PMON accumulation registers.

Counts accumulated in those registers are transferred to holding registers where they can be

read. The counters themselves are then cleared to begin accumulating events for a new

accumulation interval. The bits in this register are not affected by write accesses.

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