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ADL5511ACPZ-R7 데이터시트(PDF) 25 Page - Analog Devices |
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ADL5511ACPZ-R7 데이터시트(HTML) 25 Page - Analog Devices |
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25 / 26 page ![]() Data Sheet ADL5511 APPLICATIONS INFORMATION analog.com Rev. E | 25 of 26 Table 5. Evaluation Board Configuration Options (Continued) Component Description Default Condition R1, SW1 Device enable. When the switch is set toward the SW1 label, the ENBL pin is connected to VPOS, which enables the ADL5511. In the opposite switch position, the ENBL pin is grounded which disables the ADL5511. R1 = 0 Ω (Size 0402) SW1 = towards SW1 label C6, C10 Envelope carrier-removal filters (FLT2, FLT3). The corner frequency of the internal VENV two-pole carrier- removal filter can be reduced by placing additional capacitors in C6 and C10. C6, C10 = open (Size 0402) C2 Envelope reference carrier-removal filter (FLT1). The internal filter that removes the carrier from the envelope reference dc voltage can be augmented by placing a capacitor in C2. C2 = 100 pF (Size 0402) R3, R14, R15, R16, R17 Alternate interface. The P2 edge connector provides an alternate access point to the various ADL5511 signals. R3, R14, R15, R16, R17 = open (Size 0402) Figure 60. Layout of Evaluation Board, Bottom Side Figure 61. Layout of Evaluation Board, Top Side |
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