REV. 0

AD1981BL

–18–

VRAS

Variable Rate PCM Audio Support (Read-Only). This bit returns a 1 when Read To indicates that the variable rate

PCM audio is supported.

SPDIF

SPDIF Support (Read-Only). This bit returns a 1 when Read To indicates that the SPDIF transmitter is supported

(IEC958).

This bit is also used to validate that the SPDIF transmitter output is actually enabled. The SPDIF bit is allowed to be

set high only if the SPDIF pin (48) is pulled down at power-up, enabling the codec transmitter logic. If the SPDIF

pin is floating or pulled high at power-up, the transmitter logic is disabled; therefore, this bit returns a low, indicat-

ing that the SPDIF transmitter is not available. This bit must always be read back to verify that the SPDIF transmitter

is actually enabled.

DSA[1,0]

DAC Slot Assignments (Read/Write) (Reset Default = 00).

00 DACs 1, 2 = 3 and 4.

01 DACs 1, 2 = 7 and 8.

10 DACs 1, 2 = 6 and 9.

11 Reserved.

AMAP

Slot DAC Mappings Based on Codec ID (Read-Only). This bit returns a 1 when read to indicate that slot/DAC

mappings based on the codec ID are supported.

REVC[1,0]

REVC[1,0] = 01 indicates codec is AC ’97 revision 2.2 compliant (Read-Only).

IDC[1:0]

Indicates Codec Configuration (Read-Only).

00 = Primary.

01, 10, 11 = Secondary.

Extended Audio ID Register (Index 28h)

Reg

No. Name

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Default

28h Ext’d Audio ID IDC1 IDC0

X

X

REVC1

REVC0

AMAP

X

X

X

DSA1

DSA0

X

SPDIF X

VRAS

X605h

The Extended Audio ID register identifies which extended audio features are supported. A nonzero Extended Audio ID value indicates that one or more of the ex-

tended audio features are supported. All registers not shown, and bits containing an X are assumed to be reserved.