PIC18F6X2X datasheet(98/386 Pages) MICROCHIP

98 / 386 page

PIC18F6X2X/8X2X

DS39612A-page 96

Advance Information

 2003 Microchip Technology Inc.

PIR3: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 3

U-0

R-0

R/W-0

—

RC2IF

TX2IF

TMR4IF

CCP5IF

CCP4IF

CCP3IF

bit 7

bit 0

bit 7-6

Unimplemented: Read as ‘0’

bit 5

RC2IF: USART2 Receive Interrupt Flag bit

= The USART2 receive buffer, RCREGx, is full (cleared when RCREGx is read)

= The USART2 receive buffer is empty

bit 4

TX2IF: USART2 Transmit Interrupt Flag bit

= The USART2 transmit buffer, TXREGx, is empty (cleared when TXREGx is written)

= The USART2 transmit buffer is full

bit 3

TMR4IF: TMR3 Overflow Interrupt Flag bit

= TMR4 register overflowed (must be cleared in software)

= TMR4 register did not overflow

bit 2-0

CCPxIF: CCPx Interrupt Flag bit (ECCP3, CCP4 and CCP5)

Capture mode:

= A TMR1 or TMR3 register capture occurred (must be cleared in software)

= No TMR1 or TMR3 register capture occurred

Compare mode:

= A TMR1 or TMR3 register compare match occurred (must be cleared in software)

= No TMR1 or TMR3 register compare match occurred

PWM mode:

Unused in this mode.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

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