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440SP 데이터시트(PDF) 75 Page - Applied Micro Circuits Corporation |
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440SP 데이터시트(HTML) 75 Page - Applied Micro Circuits Corporation |
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75 / 85 page ![]() PowerPC 440SP Embedded Processor Revision 1.23 - Sept 26, 2006 AMCC Proprietary 75 Data Sheet Table 15. I/O Specifications—533MHz Notes: 1. PerClk rising edge at package pin with a 10pF load trails the internal PLB clock by approximately 1.3ns. Signal Input (ns) Output (ns) Output Current (mA) Clock Notes Setup Time (TIS min) Hold Time (TIH min) Valid Delay (TOV max) Hold Time (TOH min) I/O H (minimum) I/O L (minimum) External Slave Peripheral Interface PerAddr00:23 n/a 1 6.2 0 19.1 8.7 PerClk PerBE0 27.7 12.8 PerClk PerBLast n/a 1 5.7 n/a 19.1 8.7 PerClk PerCS0:2 n/a n/a 5.9 0 19.1 8.7 PerClk PerData0:7 1.2 1 6 0 19.1 8.7 PerClk PerOE n/a n/a 5.8 0 19.1 8.7 PerClk PerPar0 1.7 1 5.7 n/a 19.1 8.7 PerClk PerReady 3.6 1 n/a n/a 19.1 8.7 PerClk PerR/W n/a 1 5.7 n/a 19.1 8.7 PerClk PerWE n/a n/a 5.7 0 19.1 8.7 n/a ExtReset n/a n/a n/a n/a 19.1 8.7 PerClk PerClk n/a n/a n/a n/a 19.1 8.7 PLB clk PerErr 1.2 n/a n/a 19.1 8.7 PerClk |
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