PPC440GP-3CC400CZ datasheet(46/83 Pages) AMCC

46 / 83 page

440GP – Power PC 440GP Embedded Processor

AMCC

Revision 1.07 – October 4, 2007

Data Sheet

Signal Description

The PPC440GP embedded controller is provided in a 552-ball, ball grid array package. The following tables

describe the package level pinout.

In the table “Signal Functional Description” on page 48, each I/O signal is listed along with a short description of its

function. Active-low signals (for example, RAS) are marked with an overline. Please see “Signals Listed

Alphabetically” on page 18 for the pin (ball) number to which each signal is assigned.

Multiplexed Signals

Some signals are multiplexed on the same pin so that the pin can be used for different functions. In most cases,

the signal names shown in this table are not accompanied by signal names that may be multiplexed on the same

pin. If you need to know what, if any, signals are multiplexed with a particular signal, look up the name in “Signals

Listed Alphabetically” on page 18. It is expected that in any single application a particular pin will always be

programmed to serve the same function. The flexibility of multiplexing allows a single chip to offer a richer pin

selection than would otherwise be possible.

Multipurpose Signals

In addition to multiplexing, some pins are also multi-purpose. For example, the EBC peripheral controller address

pins (PerAddr00:31) are used as outputs by the PPC440GP to broadcast an address to external slave devices

when the PPC440GP has control of the external bus. When during the course of normal chip operation an external

master gains ownership of the external bus, these same pins are used as inputs which are driven by the external

master and received by the EBC in the PPC440GP. In this example, the pins are also bidirectional, serving both as

inputs and outputs.

Multimode Signals

In some cases (for example, Ethernet) the function of a pin may vary with different modes of operation. When a pin

has multiple signal names assigned to distinguish different modes of operation, all of the names are shown.

Pin Summary

Group

No. of Pins

Signal pins, non-multiplexed

347

Signal pins, multiplexed

Total Signal Pins

404

AxVDD

AGnd

OVDD

SVDD

VDD

Gnd

Total Power Pins

146

Reserved

Total Pins

552

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