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PPC440GP-3CC400CZ 데이터시트(PDF) 58 Page - Applied Micro Circuits Corporation |
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PPC440GP-3CC400CZ 데이터시트(HTML) 58 Page - Applied Micro Circuits Corporation |
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58 / 83 page ![]() 440GP – Power PC 440GP Embedded Processor 58 AMCC Revision 1.07 – October 4, 2007 Data Sheet Recommended DC Operating Conditions Device operation beyond the conditions specified is not recommended. Extended operation beyond the recommended conditions can affect device reliability. Parameter Symbol Minimum Typical Maximum Unit Notes Logic Supply Voltage VDD +1.7 +1.8 +1.9 V 4 I/O Supply Voltage OVDD +3.0 +3.3 +3.6 V 4 DDR SDRAM Supply Voltage (DDR clock up to 166MHz) SVDD +2.3 +2.5 +2.7 V 4 PLL Supply Voltages AxVDD +1.65 +1.8 +1.95 V 3 DDR SDRAM Reference Voltage SVREF +1.15 +1.25 +1.35 V 3 Input Logic High (2.5V SSTL) VIH SVREF+0.18 SVDD+0.3 V2 Input Logic High (3.3V PCI-X) 0.5OVDD OVDD+0.5 V1 Input Logic High (3.3V LVTTL, 5V tolerant receiver) +2.0 +5.5 V Input Logic Low (2.5V SSTL) VIL -0.3 SVREF-0.18 V Input Logic Low (3.3V PCI-X) -0.5 0.35OVDD V1 Input Logic Low (3.3V LVTTL, 5V tolerant receiver) 0 +0.8 V Output Logic High (2.5V SSTL) VOH +1.95 SVDD V Output Logic High (3.3V PCI-X) 0.9OVDD OVDD V1 Output Logic High (3.3V LVTTL, 5V tolerant receiver) +2.4 OVDD V Output Logic Low (2.5V SSTL) VOL 00.55 V Output Logic Low (3.3V PCI-X) 0.1OVDD V1 Output Logic Low (3.3V LVTTL, 5V tolerant receiver) 0 +0.4 V Input Leakage Current (No pull-up or pull-down) IIL1 00 μA Input Leakage Current for Pull-Down IIL2 0 (LPDL) 200 (MPUL) μA 5 Input Leakage Current for Pull-Up IIL3 -150 (LPDL) 0 (MPUL) μA 5 Input Max Allowable Overshoot (3.3V LVTTL, 5V tolerant receiver) VIMAO +5.5 V Input Max Allowable Undershoot (3.3V LVTTL, 5V tolerant receiver) VIMAU -0.6 V Output Max Allowable Overshoot (3.3V LVTTL, 5V tolerant receiver) VOMAO +5.5 V Output Max Allowable Undershoot (3.3V LVTTL, 5V tolerant receiver) VOMAU3 -0.6 V |
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