| 전자부품 데이터시트 검색엔진 |
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HT36B2 데이터시트(PDF) 21 Page - Holtek Semiconductor Inc |
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HT36B2 데이터시트(HTML) 21 Page - Holtek Semiconductor Inc |
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21 / 39 page ![]() Mnemonic Description Instruction Cycle Flag Affected Branch JMP addr SZ [m] SZA [m] SZ [m].i SNZ [m].i SIZ [m] SDZ [m] SIZA [m] SDZA [m] CALL addr RET RET A,x RETI Jump unconditionally Skip if data memory is zero Skip if data memory is zero with data movement to ACC Skip if bit i of data memory is zero Skip if bit i of data memory is not zero Skip if increment data memory is zero Skip if decrement data memory is zero Skip if increment data memory is zero with result in ACC Skip if decrement data memory is zero with result in ACC Subroutine call Return from subroutine Return from subroutine and load immediate data to ACC Return from interrupt 2 1 (2) 1 (2) 1 (2) 1 (2) 1 (3) 1 (3) 1 (2) 1 (2) 2 2 2 2 None None None None None None None None None None None None None Table Read TABRDC [m] TABRDL [m] Read ROM code (current page) to data memory and TBLH Read ROM code (last page) to data memory and TBLH 2 (1) 2 (1) None None Miscellaneous NOP CLR [m] SET [m] CLR WDT CLR WDT1 CLR WDT2 SWAP [m] SWAPA [m] HALT No operation Clear data memory Set data memory Clear Watchdog Timer Pre-clear Watchdog Timer Pre-clear Watchdog Timer Swap nibbles of data memory Swap nibbles of data memory with result in ACC Enter power down mode 1 1 (1) 1 (1) 1 1 1 1 (1) 1 1 None None None TO,PDF TO (4),PDF(4) TO (4),PDF(4) None None TO,PDF Note: x: Immediate data m: Data memory address A: Accumulator i: 0~7 number of bits addr: Program memory address Ö: Flag is affected -: Flag is not affected (1): If a loading to the PCL register occurs, the execution cycle of instructions will be delayed for one more cycle (four system clocks). (2): If a skipping to the next instruction occurs, the execution cycle of instructions will be delayed for one more cycle (four system clocks). Otherwise the original instruction cycle is unchanged. (3): (1) and (2) (4): The flags may be affected by the execution status. If the Watchdog Timer is cleared by executing the CLR WDT1 or CLR WDT2 instruction, the TO and PDF are cleared. Otherwise the TO and PDF flags remain unchanged. HT36B2 Rev. 1.10 21 March 10, 2005 |
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