STA5620

Chip enable and reset timing

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8

Chip enable and reset timing

Figure 5.

Chip enable and reset timing

8.1

Principle of operation

With power supply applied and CHIP_EN inactive the chip is in stand-by mode consuming

just a minimal leakage current (<10µA). Applying CHIP_EN High turns-on the chip and

starts the Crystal oscillator. Two internal counters driven by the Oscillator output are used to

create two timing periods to:

●

The first time period (Clock Out Enable) is long enough to safely enable XTAL_CLK as

early as possible by default during oscillator startup.

●

The second period (Internal reset) generates an internal reset pulse long enough to

guarantee open-loop clock stabilization (driven either by internal oscillator or by off-chip

TCXO) and be able to load the chip default configuration.

The default initial configurations depend on the state of the MODE input pin. After this

phase, the chip configuration may be modified by the baseband unit with a set of SPI

commands, allowing a more specific configuration to be set

VDD Power

Xce (XTAL_CLK enable)

reset

CHIP_EN

MODE

MODE

Pin

setting

Power -on

Internal reset

(min. 4ms)

Clock

Out

Enable

(min 1µs)

Mode = 0

Mode = 1

Internal

Oscillator

<chip config>

Chip

Config

setting

AC00328