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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STA5620 데이터시트(PDF) 24 Page - STMicroelectronics |
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STA5620 데이터시트(HTML) 24 Page - STMicroelectronics |
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24 / 29 page  Chip enable and reset timing STA5620 24/29 Note: Disabling a digital output buffer means driving it low. Divider configuration NDIV[11:0] PLL Feedback Divider Division Ratio (mapped as 2 byte registers) 56 to 4095 96 1555 RDIV[5:0] Reference Divider Division Ratio (write of this register updates all of the ndiv, rdiv vector) 1 to 63 1 19 Charge pump current selector CPI[1:0] Charge Pump Current Selector 00 = 50 μA 01 = 100 μA 10 = 150 μA 11 = 200 μA 11 11 Output slew rate control LSR XTAL_CLK, GPS_CLK,TEST_CLK, SPI_DO, SIGN and MAG Output Drivers Slew Rate 0 = Fast 1 = Slow 11 Table 15. Default configuration (continued) Bit Name Description Values (MODE_EN=0) (MODE_EN=1) |
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