AS8267 datasheet(74/136 Pages) AMSCO

74 / 136 page

Data Sheet AS8267 / AS8268

Revision 1.0, 19-Jun-07

Page 74 of 136

For the data to be actually written, the S_N must be brought high after the least significant bit (D0) of the n

th data byte has

been clocked in. If S_N is brought high at any other time, the write operation will not be completed. While the write is in

progress, the status register may be read to check the status. A read attempt of a memory array location will not be possible

during a write cycle. When the write cycle is completed, the write enable latch is reset.

Byte Write

MISO

MOSI

S_N

High Impedance

Instruction

16 Bit Address

Data Byte

TWC

012

567

Page Program (max. 64 bytes)

567

Instruction

16 Bit Address

Data Byte 1

S_N

Data Byte 2

Data Byte 3

MISO

Data Byte n (64 max)

MISO

S_N

Example PROG Page Sequence

0x01

… set REQ bit by writing 0x04 to status register

0x04

… -“-

0x05

… read Flash status register until Flash is ready

0x06

… set Flash write enable

0x02

… write Flash instruction

0x00

… Start address, e.g. 80h

0x80

… -“-

Dat0

… put byte 0 to address

Dat1

… put byte 1 to address + 1

10. …

… max. 64 bytes (page size), then repeat sequence from step 2.

11. 0x01

… clear REQ bit by writing 0x00 to status register

12. 0x00

… -“-

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