MPC8280 datasheet(358/1386 Pages) FREESCALE

358 / 1386 page

PCI Bridge

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

9-50

Freescale Semiconductor

9.11.2.5

Revision ID Register

Figure 9-37 and Table 9-24 describe the revision ID register.

Figure 9-37. Revision ID Register

9.11.2.6

PCI Bus Programming Interface Register

Figure 9-38 and Table 9-25 describe the PCI bus programming interface register.

Figure 9-38. PCI Bus Programming Interface Register

Field

RID

Reset

Refer to Table 9-24.

R/W

Addr

0x08

Table 9-24. Revision ID Register Description

Bits

Name

Reset

Value

Description

7–0

Revision ID

Revision

Dependent

Specifies a device-specific revision code for the MPC8280 (assigned

by Freescale). Revision ID = 0x11 for .25

µm revisions A.0, B.1, and

C.0. Revision ID = 0x20 for 0.13

µm devices.

Field

Reset

Refer to Table 9-25.

R/W

Addr

0x09

Table 9-25. PCI Bus Programming Interface Register Description

Bits

Name

Description

7–0

Programming interface

0x00 When the PCI bridge is configured as host bridge.

0x01 When the PCI bridge is configured as a peripheral device to indicate the

programming model supports the I2O interface.

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